(1) Field of the Invention
The present invention relates to processes used to fabricate semiconductor devices, and more specifically to a process used to improve the endurance of a flash Electrically Erasable Programmable Read Only Memory, (EEPROM), device.
(2) Description of the Prior Art
Electrical Erasable Programmable Read Only Memory devices store data in a non-volatile mode, and can be erased and rewritten as desired. The EEPROM device, unlike the EPROM, (Erasable Programmable read Only Memory), device, which needs exposure to radiation, can be erased electrically. One form of EEPROM devices, is comprised of a "split gate" electrode configuration, in which the control gate overlies a portion of an underlying floating gate, and overlies a portion of the channel region. One type of EEPROM device providing electrical erasing is a Flash EEPROM, in which the term flash refers to the ability to erase numerous memory cells simultaneously. The flash EEPROM is usually programmed by applying a voltage to the control gate, creating hot electron carrier injection, raising the threshold voltage of all transistors being programmed.
The endurance of the flash EEPROM device, or the amount of program/erase cycles the device can withstand, is related to the coupling ratio at the source. For example a low coupling ratio at the source side of the single cell device may only provide about 400,000 program/erase cycles, due to hot electrons being trapped in an inter-polysilicon oxide layer. This invention will describe a process in which a shallow and highly doped source side, in addition to the lighter doped, deep source region, is used to increase the coupling ratio at the source side, and thus increase the single cell endurance from about 400 K cycles, to about 1000 K cycles, and increase the product endurance for a flash EEPROM, from about 40,000 to 70,000 cycles. Prior art such as Kuo, et al, in U.S. Pat. No. 5,130,769, describe a split gate EEPROM device, featuring the creation of a diode in the drain region. However that invention differs from the shallow source side implantation procedure, presented in this invention, in which only one conductivity ions are used, not creating a diode.